A multi site carbon nanotube silicon via based on three-dimensional integrated circuits

       A novel three position carbon nanotube TSV is proposed to address the I/O limitation problem between layers in three-dimensional integrated circuits. Firstly, the parasitic parameters of the three position CNT TSV are numerically calculated using HFSS software. Compared with theoretical numerical calculations, it has high accuracy, and the error size of each parasitic parameter is within 3%. An equivalent circuit model of the structure is built in ADS, and its S parameters are simulated. Compared with the S parameter simulation results of HFSS, the error is within 1 Within 2%. Then, based on the concept of three CNT TSVs, a new differential multi bit CNT TSV was proposed. Compared with traditional GSSG TSV and two new dual bit TSVs (G-SS-G and GS-SG), the proposed differential multi bit CNT TSV saves chip area, improves integration density, and has superior anti-interference ability and better delay performance. Finally, time-domain eye diagram simulations were conducted on the proposed TSV structure, indicating that the new structure has good signal integrity.

       Through Silicon Via, TSV Technology has promoted the development of three-dimensional integrated circuits, which can reduce the limitations of traditional planar integrated circuits, shorten interconnect lengths, improve integration density, and reduce power consumption. However, the area occupied by TSVs is much larger than that of on-chip channels. In addition, the number of TSVs in any substrate is limited by the difference between TSV filling materials and substrate thermal expansion coefficients. In order to prevent substrate cracking caused by thermal stress, the area occupied by TSVs in silicon substrates is limited to about 2% of the substrate area. Therefore, how to solve the I/O limitation between layers in three-dimensional structures is a major problem.

       Carbon nanotubes, as an emerging material, can usually replace copper (Cu) and tungsten (W) as filling materials for TSVs due to their superior electrical, thermal, and mechanical properties. The resistance of Cu is approximately 2 On the contrary, the resistance between adjacent CNTs in the bundle is about megaohms. Fu Kai from Hangzhou University of Electronic Science and Technology studied the transmission characteristics of TSV filled with carbon nanotubes, extracted TSV impedance using effective conductivity, and studied the effects of CNT filling ratio, temperature, and other geometric parameters on transmission performance. Rao from the Indian Institute of Information Technology established an electrical model for Cu and CNT mixed filling TSV, which includes single-walled carbon nanotubes and multi walled carbon nanotubes with different ratios. Vaisband from the University of California, Los Angeles proposed electrical and thermal models for the interface between CNT TSV and graphene interconnection, and used COMSOL software to simulate and verify the proposed model, comparing CNT and multilayer graphene. The resistance and thermal resistance of both CNT and Cu structures indicate that using MLG instead of Cu as an interconnect with CNT can significantly reduce the resistance and thermal resistance of the interconnect interface.

       In addition to different filling materials and different interconnect interfaces, the number of signals transmitted by CNTs is also a key issue in I/O limitation. Vaisband first proposed the concept of dual CNT TSV and its equivalent circuit model, evaluating the capacitive coupling and leakage current between bits. As the operating frequency increases, differential signals are often used to ensure the integrity of signal transmission due to their ability to suppress common mode noise and anti-interference characteristics. As one of the most popular forms of differential transmission channels, Ground Signal Ground (GSSG) TSV has been modeled, manufactured, and analyzed, and research has shown that GSSG TSV is an effective noise reduction method. However, in high-density TSV arrays, GSSG TSV is an effective noise reduction method. G-type TSV is inevitably affected by differential mode noise coupling caused by adjacent differential channels. Zhao Wensheng's team from Hangzhou University of Electronic Science and Technology proposed a new differential TSV (D-TSV) based on dual CNT TSV, studied its equivalent circuit model, and extracted the relevant impedance using Partial Element Equivalent Circuit (PEEC) method, Compared with traditional GSSG TSV, this model has better anti-interference characteristics.

Schematic diagram of differential multi bit CNT TSV

       In order to further enhance the interlayer I/O of 3D integration, TSVs need to have lower delay time and smaller area. By utilizing the anisotropy of CNTs, a three position CNT TSV capable of transmitting multiple independent signals is proposed, allowing a single TSV to transmit multiple independent signals. This function is achieved by connecting carbon nanotube groups to separate the pads at the top and bottom of the TSV, which are made of multi-layer graphene. The proposed three position CNT TSV can double the number of I/O between layers without occupying additional substrate area. In other words, it can meet specific interlayer I/O requirements with fewer three position TSVs.